ASD Technical Report, Numéro 63,Partie 4173

1-place functions 3-valued switching functions applied Boolean coefficients column commutative compositions constraints decomposition chart denoted designation vector Digital diode circuits disjunctive decomposition example expansion theorem f₁ fan-out Feed-Forward function F functionally complete given h(V₁ identically input isomorphic classes Iteration k₂ LIBRARIES THE OHIO linearly separable function Logical Design matrix mechanization modulo-2 function modulo-2 gates modulo-2 sums network synthesis nondisjunctive decomposition number of modulo-2 number of variables obtained OHIO STATE UNIVERSITY orthogonal expansion orthogonal functions Orthogonal Matrix orthogonal polynomial output P₁ Parametron partition reduced rows Sheffer functions shown in Fig simplification procedure subnetworks subsection symmetric functions synthesis procedure t₁ t₂ technique ternary logic Ternary Threshold Device ternary threshold functions threshold elements threshold gates threshold logic threshold network threshold realizations tion transistor truth function truth table truth values tunnel diodes UNIVERSITY LIBRARIES V₁ w₁ weight set zero